Designing reliable circuits has become increasingly complex particularly in view of aggressively scaled complementary metal-oxide-semiconductor (CMOS) technologies. For example, modern IC manufacturing processes capable of producing small devices increase the potential for interface traps in P-type metal-oxide-semiconductor (PMOS) devices during prolonged times of negative bias stress. An interface trap is created when a negative voltage is applied to the gate of a PMOS device for a prolonged time. The interface trap is located near the Si-oxide/Si-crystal lattice boundary where holes, i.e., positive charge, can get stuck, thereby causing a shift in the threshold voltage of the PMOS device. Hole trapping creates interface states as well as fixed charges. Both are positive charges and result in a negative shift of threshold voltage. This phenomenon is called PMOS Negative Bias Temperature Instability (NBTI). NBTI affects PMOS devices more so than N-type metal-oxide-semiconductor (NMOS) devices. A phenomenon called Positive BTI (PBTI), however, affects NMOS devices.
In view of trends to reduce device size and voltage margins in modern IC designs, phenomenon such as BTI, in reference to NBTI and/or PBTI, can be a significant factor in limiting the lifetime of CMOS devices. Other phenomena such as hot-carrier injection (HCI) can combine with BTI to reduce the lifetime of CMOS devices to an even greater extent. Because of the phenomena noted, circuit designers must over design devices to offset the degradation that occurs over the lifetime of a device. Circuit designers create devices within the IC that have operational characteristics that, for example, may be different or higher than the operational characteristics required by the circuit specification.
When a device is overdesigned, the operational characteristics of the device such as power usage, area usage, performance, or the like, can vary markedly from established target characteristics of the device as specified in the circuit specification. As a result, the device can be less than optimized, if not unsuitable, for the intended purpose of the device. Apart from the device being unsuited for an intended purpose, overdesign also can add cost to a circuit design, particularly when applied across the many devices that are within modern ICs.